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INTEGRATED CIRCUIT DESIGN FOR SIGNAL INTEGRITY, AVOIDING WELL PROXIMITY EFFECTS
INTEGRATED CIRCUIT DESIGN FOR SIGNAL INTEGRITY, AVOIDING WELL PROXIMITY EFFECTS
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机译:信号完整性的集成电路设计,避免了良好的接近效应
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摘要
A method, system and program product for designing an integrated circuit (IC) for signal integrity. The invention conducts a signal integrity analysis on an IC design; identifies any field effect transistor (FET) that causes a signal integrity failure in the case that the IC design fails the signal integrity analysis; and modifies an edge of a failing FET that is closer than a threshold distance to a well edge. The invention eliminates the manual, iterative procedure for determining the device causing a signal integrity failure due to well proximity effects.
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