Duty analysis system for a semiconductor integrated circuit and duty analysis method of the same

摘要

A system for analyzing a monolithic integrated circuit includes a logic circuit simulator configured to obtain a cell duty of a primitive cell configuring a logic circuit by performing a logic simulation of the logic circuit based on a netlist of the logic circuit and input vectors for the logic circuit, an analog circuit simulator configured to obtain a transistor duty of a transistor that configures a primitive cell by performing an analog simulation of the primitive cell based on a netlist of the analog circuit of the primitive cell and input vectors for the primitive cell, and a synthesis module configured to obtain a synthesized duty of a transistor of the logic circuit by performing a synthesis of the cell and transistor duties.