Semiconductor integrated circuit operation analysis method, operation analysis apparatus, operation analysis program, and operation analysis system

摘要

An operation analyzing apparatus (100) for semiconductor integrated circuits according to this exemplary embodiment includes a simulation analyzing unit (140), and the simulation analyzing unit (140) includes: a semiconductor characteristics extracting unit (110) that extracts the inductances L, resistances R, and capacitances C of a board, a package, and a semiconductor integrated circuit, from the semiconductor integrated circuit mounted on the board via the package; an individual network generating unit (111) that generates individual networks of the extracted inductance L, resistance R, and capacitance C with respect to each of said semiconductor substrate, said package, and said semiconductor integrated circuit; an integrated network generating unit (112) that generates an integrated network by integrating all of the generated individual networks; and an operation simulation running unit (113) that performs an operation simulation of the semiconductor integrated circuit by inserting a test noise pattern to an arbitrary position in the generated integrated network.