首页> 外国专利> GUIDELINES FOR LOGICAL AND LEGISLATIVE STRUCTURE TESTING DIGITAL LOGICAL ACTIVITIES

GUIDELINES FOR LOGICAL AND LEGISLATIVE STRUCTURE TESTING DIGITAL LOGICAL ACTIVITIES

机译:逻辑和立法结构测试数字逻辑活动的指南

摘要

An apparatus for performing logic and leakage current tests on a logic circuit device under test (DUT) includes a local module for each terminal of the DUT. For performing logic test, each local module has a driver for supplying a logic signal input to the DUT terminal, a comparator for detecting the DUT output at the terminal, and a clamping circuit for limiting the voltage swing at the DUT terminal during the logic test. For performing a leakage current test, each local module includes a source for supplying a parametric signal to the DUT terminal. The voltage the parametric signal produces at the DUT terminal, as detected by the comparator, indicates the terminal's leakage current. The parametric signal source and the clamping circuit are connected to the DUT terminal through Schottky diodes. During a logic test the parametric signal source is isolated from the DUT terminal by reverse biasing the Schottky diodes linking the parametric signal source to the DUT terminal. Conversely, during a leakage current test, the clamping circuit is isolated from the DUT terminal by reverse biasing the Schottky diodes linking it to the DUT terminal. The Schottky diodes, when reverse biased, have very low capacitance and leakage current. Thus a DUT terminal leakage current measurement is not substantially influenced by leakage current through the clamping circuit and the edges of logic signal pulses are not substantially affected by capacitance added to the DUT terminal by the parametric signal source.
机译:一种用于在被测逻辑电路器件(DUT)上执行逻辑和泄漏电流测试的设备,包括用于DUT的每个端子的本地模块。为了执行逻辑测试,每个本地模块都有一个驱动器,用于将逻辑信号输入到DUT端子;一个比较器,用于检测该端子上的DUT输出;以及一个钳位电路,用于在逻辑测试期间限制DUT端子上的电压摆幅。为了执行泄漏电流测试,每个本地模块都包括一个用于将参数信号提供给DUT端子的源。比较器检测到的参量信号在DUT端子上产生的电压指示该端子的泄漏电流。参数信号源和钳位电路通过肖特基二极管连接到DUT端子。在逻辑测试期间,通过反向偏置将参量信号源链接到DUT端子的肖特基二极管,将参量信号源与DUT端子隔离。相反,在泄漏电流测试期间,通过反向偏置将其连接至DUT端子的肖特基二极管,将钳位电路与DUT端子隔离。肖特基二极管反向偏置时,电容和漏电流非常低。因此,DUT端子泄漏电流的测量基本上不受通过钳位电路的泄漏电流的影响,逻辑信号脉冲的边沿也不受参数信号源添加到DUT端子的电容的影响。

著录项

  • 公开/公告号DE69731946D1

    专利类型

  • 公开/公告日2005-01-20

    原文格式PDF

  • 申请/专利权人 CREDENCE SYSTEMS CORP. FREMONT;

    申请/专利号DE19976031946T

  • 发明设计人 MILLER A.;

    申请日1997-01-17

  • 分类号G01R31/30;

  • 国家 DE

  • 入库时间 2022-08-21 21:59:04

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