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Ideal operational amplifier layout techniques for reducing the package-induced stress influence on offset voltage
Ideal operational amplifier layout techniques for reducing the package-induced stress influence on offset voltage
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机译:理想的运算放大器布局技术,可减少封装引起的应力对失调电压的影响
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摘要
A method of reducing package stress includes placing matched components (A, B) of an op-amp substantially in a region of a die having the least stress gradients. The region is located in the centre (C) of the die. Further, the centre is the common centroid of the die. The matched components are the current mirror input stages of the op-amp. In one embodiment, a semiconductor configuration includes a die having a region with the least stress gradients, and an op amp containing matched components that are located substantially in the region.
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