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ANALYTIC STRUCTURE FOR FAILURE ANALYSIS OF SEMICONDUCTOR DEVICE AND METHOD OF FAILURE ANALYSIS USING THE SAME
ANALYTIC STRUCTURE FOR FAILURE ANALYSIS OF SEMICONDUCTOR DEVICE AND METHOD OF FAILURE ANALYSIS USING THE SAME
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机译:半导体器件故障分析的分析结构及使用该方法的故障分析方法
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摘要
In a method and structure for semiconductor failure analysis, the structure comprises: a plurality of analytic fields disposed on a predetermined area of a semiconductor device; semiconductor transistors arranged in each of the analytic fields, the semiconductor transistors arranged in an array; wordlines arranged on each of the plurality of the analytic fields, connecting the semiconductor transistors with each other in a first direction; and bitline structures on each of the plurality of the analytic fields, connecting the semiconductor transistors with each other in a second direction, wherein the bitline structures are configured in different patterns in each of the plurality of analytic fields.
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