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METHOD TO REDUCE RESIDUAL STI CORNER DEFECTS GENERATED DURING SPE IN THE FABRICATION OF NANO-SCALE CMOS TRANSISTORS USING DSB SUBSTRATE AND HOT TECHNOLOGY
METHOD TO REDUCE RESIDUAL STI CORNER DEFECTS GENERATED DURING SPE IN THE FABRICATION OF NANO-SCALE CMOS TRANSISTORS USING DSB SUBSTRATE AND HOT TECHNOLOGY
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机译:利用DSB衬底和热技术减少纳米尺度CMOS晶体管制造中SPE产生的残余STI角缺陷的方法
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摘要
A device and method of reducing residual STI corner defects in a hybrid orientation transistor comprising, forming a direct silicon bonded substrate wherein a second silicon layer with a second crystal orientation is bonded to a handle substrate with a first crystal orientation, forming a pad oxide layer on the second silicon layer, forming a nitride layer on the pad oxide layer, forming an isolation trench within the direct silicon bonded substrate through the second silicon layer and into the handle substrate, patterning a PMOS region of the direct silicon bonded substrate utilizing photoresist including a portion of the isolation trench, implanting and amorphizing an NMOS region of the direct silicon bonded substrate, removing the photoresist, performing solid phase epitaxy, performing a recrystallization anneal, forming an STI liner, completing front end processing, and performing back end processing.
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