首页> 外国专利> METHOD TO REDUCE RESIDUAL STI CORNER DEFECTS GENERATED DURING SPE IN THE FABRICATION OF NANO-SCALE CMOS TRANSISTORS USING DSB SUBSTRATE AND HOT TECHNOLOGY

METHOD TO REDUCE RESIDUAL STI CORNER DEFECTS GENERATED DURING SPE IN THE FABRICATION OF NANO-SCALE CMOS TRANSISTORS USING DSB SUBSTRATE AND HOT TECHNOLOGY

机译:利用DSB衬底和热技术减少纳米尺度CMOS晶体管制造中SPE产生的残余STI角缺陷的方法

摘要

A device and method of reducing residual STI corner defects in a hybrid orientation transistor comprising, forming a direct silicon bonded substrate wherein a second silicon layer with a second crystal orientation is bonded to a handle substrate with a first crystal orientation, forming a pad oxide layer on the second silicon layer, forming a nitride layer on the pad oxide layer, forming an isolation trench within the direct silicon bonded substrate through the second silicon layer and into the handle substrate, patterning a PMOS region of the direct silicon bonded substrate utilizing photoresist including a portion of the isolation trench, implanting and amorphizing an NMOS region of the direct silicon bonded substrate, removing the photoresist, performing solid phase epitaxy, performing a recrystallization anneal, forming an STI liner, completing front end processing, and performing back end processing.
机译:减少混合取向晶体管中残留的STI角缺陷的装置和方法,包括形成直接硅键合衬底,其中将具有第二晶体取向的第二硅层结合到具有第一晶体取向的处理衬底上,形成焊盘氧化物层在第二硅层上形成氮化物层,在垫氧化层上形成氮化物层,在直接硅键合衬底内形成隔离沟槽,穿过第二硅层并进入操作衬底,并利用包括隔离沟槽的一部分,对直接硅键合衬底的NMOS区域进行注入和非晶化,去除光致抗蚀剂,执行固相外延,执行重结晶退火,形成STI衬垫,完成前端处理和后端处理。

著录项

相似文献

  • 专利
  • 外文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号