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Apparatus and method for preventing configurable system-on-a-chip integrated circuits from becoming I/O limited

机译:用于防止可配置的片上系统集成电路成为I / O受限的装置和方法

摘要

An integrated circuit containing multiple modules coupled to a pad via a multiplexer. The modules are selectively coupled to the pad by the multiplexer to provide integrated circuit function flexibility with a limited number of pads. A multiplexer select signal determines which module or clock circuit is coupled by the multiplexer. A common buffer may be coupled between the multiplexer and the pad to save substrate space. An analog circuit may be coupled to the pad to provide a signal path minimizing signal distortion. The integrated circuit's clock may be coupled via the multiplexer to an off-substrate circuit. Selective module coupling improves the integrated circuit's testing speed, may salvage an integrated circuit containing a malfunctioning module, and provides for signal loopback during testing.
机译:一种集成电路,包含通过多路复用器耦合到焊盘的多个模块。模块通过多路复用器选择性地耦合到焊盘,以利用有限数量的焊盘来提供集成电路功能的灵活性。多路复用器选择信号确定哪个模块或时钟电路由多路复用器耦合。公共缓冲器可以耦合在多路复用器和焊盘之间以节省衬底空间。模拟电路可以耦合到焊盘以提供使信号失真最小化的信号路径。集成电路的时钟可以通过多路复用器耦合到衬底外电路。选择性模块耦合提高了集成电路的测试速度,可以挽救包含故障模块的集成电路,并在测试期间提供信号回送。

著录项

  • 公开/公告号US7564141B2

    专利类型

  • 公开/公告日2009-07-21

    原文格式PDF

  • 申请/专利权人 VIKRAM GUPTA;ED LAMBERT;

    申请/专利号US20060509714

  • 发明设计人 ED LAMBERT;VIKRAM GUPTA;

    申请日2006-08-25

  • 分类号H01L23/48;H01L23/52;H01L29/40;

  • 国家 US

  • 入库时间 2022-08-21 19:31:25

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