首页> 外国专利> Semiconductor memory device testing on/off state of on-die-termination circuit during data read mode, and test method of the state of on-die-termination circuit

Semiconductor memory device testing on/off state of on-die-termination circuit during data read mode, and test method of the state of on-die-termination circuit

机译:半导体存储器件在数据读取模式下测试管芯终结电路的通/断状态以及管芯终结电路的状态的测试方法

摘要

A semiconductor memory device for testing whether an ODT circuit is on or off during a data read mode includes an on-die termination (ODT) circuit and an ODT state information output unit. The ODT circuit includes at least one ODT resistor. The ODT state information output unit outputs an ODT state information signal indicating whether the ODT circuit is on or off, in response to an ODT control signal during a data read mode when data is output from memory cells. With a semiconductor memory device and method capable of testing whether an ODT resistor is on or off during a data read mode, it is possible to test whether an ODT circuit is on or off during reading of data.
机译:用于在数据读取模式期间测试ODT电路是导通还是截止的半导体存储装置包括管芯上终端(ODT)电路和ODT状态信息输出单元。该ODT电路包括至少一个ODT电阻器。当从存储单元输出数据时,ODT状态信息输出单元响应于ODT控制信号在数据读取模式期间输出指示ODT电路是接通还是断开的ODT状态信息信号。利用能够在数据读取模式期间测试ODT电阻器是打开还是关闭的半导体存储器件和方法,可以测试在读取数据期间ODT电路是打开还是关闭。

著录项

  • 公开/公告号US7525339B2

    专利类型

  • 公开/公告日2009-04-28

    原文格式PDF

  • 申请/专利权人 HYONG-YONG LEE;

    申请/专利号US20070717959

  • 发明设计人 HYONG-YONG LEE;

    申请日2007-03-14

  • 分类号H03K17/16;

  • 国家 US

  • 入库时间 2022-08-21 19:29:39

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