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Semiconductor memory device testing on/off state of on-die-termination circuit during data read mode, and test method of the state of on-die-termination circuit
Semiconductor memory device testing on/off state of on-die-termination circuit during data read mode, and test method of the state of on-die-termination circuit
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机译:半导体存储器件在数据读取模式下测试管芯终结电路的通/断状态以及管芯终结电路的状态的测试方法
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摘要
A semiconductor memory device for testing whether an ODT circuit is on or off during a data read mode includes an on-die termination (ODT) circuit and an ODT state information output unit. The ODT circuit includes at least one ODT resistor. The ODT state information output unit outputs an ODT state information signal indicating whether the ODT circuit is on or off, in response to an ODT control signal during a data read mode when data is output from memory cells. With a semiconductor memory device and method capable of testing whether an ODT resistor is on or off during a data read mode, it is possible to test whether an ODT circuit is on or off during reading of data.
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