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Selectively powering down tag or data memories in a cache based on overall cache hit rate and per set tag hit rate
Selectively powering down tag or data memories in a cache based on overall cache hit rate and per set tag hit rate
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机译:根据整体高速缓存命中率和每个设置的标签命中率,有选择地关闭高速缓存中的标签或数据存储器的电源
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摘要
A CPU incorporating a cache memory is provided, in which a high processing speed and low power consumption are realized at the same time. A CPU incorporating an associative cache memory including a plurality of sets is provided, which includes a means for observing a cache memory area which does not contribute to improving processing performance of the CPU in accordance with an operating condition, and changing such a cache memory area to a resting state dynamically. By employing such a structure, a high-performance and low-power consumption CPU can be provided.
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