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Chip assembly module of bump connection type using a multi-layer printed circuit substrate

机译:使用多层印刷电路基板的凸点连接型芯片组装模块

摘要

A multi-layer structured printed circuit substrate (50) having an upper conductive layer (51) and a lower conductive layer (52) with an inter-layer insulating layer (53) is used. A chip assembly part (23) of bump connection type is formed by forming openings (51A, 53A) in a portion of the upper conductive layer and the inter-layer insulating layer in order to expose the lower conductive layer. A bear chip (10) is buried in the chip assembly part for assembly. A sealing member (60) is filled in the lower space of the bear chip. A flat plate type radiating plate (80) having an opening (81) corresponding to the chip assembly part is located on the substrate and a heat conductive adhesive (90) is filled between said radiating plate and the bear chip. IMAGE IMAGE
机译:使用具有上部导电层(51)和具有层间绝缘层(53)的下部导电层(52)的多层结构的印刷电路基板(50)。通过在上部导电层和层间绝缘层的一部分中形成开口(51A,53A)以暴露下部导电层,来形成凸块连接型的芯片组装部分(23)。裸芯片(10)埋在芯片组装部件中以进行组装。密封构件(60)填充在承载芯片的下部空间中。在基板上设置有具有与芯片组装部对应的开口(81)的平板型散热板(80),在该散热板与裸芯片之间填充有导热性粘接剂(90)。 <图像> <图像>

著录项

  • 公开/公告号EP1076361B1

    专利类型

  • 公开/公告日2010-11-03

    原文格式PDF

  • 申请/专利权人 FUJIKURA LTD.;

    申请/专利号EP20000402237

  • 发明设计人 SEKI YOSHIHITO;KAIZU MASAHIRO;

    申请日2000-08-07

  • 分类号H01L23/498;H01L23/36;

  • 国家 EP

  • 入库时间 2022-08-21 18:40:18

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