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Method and structures for accelerated soft-error testing

机译:加速软错误测试的方法和结构

摘要

An integrated circuit, method of forming the integrated circuit and a method of testing the integrated circuit for soft-error fails. The integrated circuit includes: a silicon substrate; a dielectric layer formed over the substrate; electrically conductive wires formed in the dielectric layer, the wires interconnecting semiconductor devices formed in the substrate into circuits; and an alpha particle emitting region in the integrated circuit chip proximate to one or more of the semiconductor devices. The method includes exposing the integrated circuit to an artificial flux of thermal neutrons to cause fission of atoms in the alpha particle emitting region into alpha particles and other atoms.
机译:集成电路,形成该集成电路的方法和测试该集成电路的软错误的方法失败了。该集成电路包括:硅基板;以及硅。在基板上形成的介电层;在电介质层中形成的导电线,将在基板中形成的半导体器件互连成电路的线;集成电路芯片中靠近一个或多个半导体器件的α粒子发射区。该方法包括将集成电路暴露于热中子的人造通量以引起α粒子发射区域中的原子裂变为α粒子和其他原子。

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