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DEVICE FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT, METHOD FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT, PROGRAM FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT, AND STORAGE MEDIUM STORING PROGRAM FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT THEREIN
DEVICE FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT, METHOD FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT, PROGRAM FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT, AND STORAGE MEDIUM STORING PROGRAM FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT THEREIN
PROBLEM TO BE SOLVED: To promote integration of a semiconductor integrated circuit by shortening a length of a scanning wire.SOLUTION: A device 1 for designing a semiconductor integrated circuit includes: a logic synthesizing section 11; a compression circuit generating section 12; a scan synthesizing section 13; a register arrangement determining section 15; a compression circuit changing section 16; and a layout data generating section 17. The logic synthesizing section 11 executes logic synthesis to generate hardware description. The compression circuit generating section 12 adds compression scan description to the hardware description. The scan synthesizing section 13 executes scan synthesis to the hardware description to generate a first net list. The register arrangement determining section 15 determines register arrangement on a layout of the semiconductor integrated circuit corresponding to the first net list. The compression circuit changing section 16 changes a configuration of the compression scan circuit to generate a second net list. The layout data generating section 17 generates layout data corresponding to the second net list.
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