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DRAM AND METHOD FOR TESTING THE SAME IN THE WAFER LEVEL BURN-IN TEST MODE
DRAM AND METHOD FOR TESTING THE SAME IN THE WAFER LEVEL BURN-IN TEST MODE
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机译:在晶圆级烧入测试模式下测试其的DRAM和方法
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摘要
A dynamic random-access memory (DRAM) and a method for testing the DRAM are provided. The DRAM includes a memory cell, a bit line associated with the memory cell, a local buffer, and a bit line sense amplifier (BLSA). The local buffer receives a first power voltage as power supply. The local buffer provides a ground voltage to the bit line when a data signal is de-asserted and provides the first power voltage to the bit line when the data signal is asserted. The BLSA receives a second power voltage as power supply. The BLSA provides the second power voltage to the bit line when the data signal and a wafer level burn-in test signal are both asserted. The second power voltage may be higher than the first power voltage. The wafer level burn-in test signal is asserted when the DRAM is in a wafer level burn-in test mode.
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