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DRAM AND METHOD FOR TESTING THE SAME IN THE WAFER LEVEL BURN-IN TEST MODE

机译:在晶圆级烧入测试模式下测试其的DRAM和方法

摘要

A dynamic random-access memory (DRAM) and a method for testing the DRAM are provided. The DRAM includes a memory cell, a bit line associated with the memory cell, a local buffer, and a bit line sense amplifier (BLSA). The local buffer receives a first power voltage as power supply. The local buffer provides a ground voltage to the bit line when a data signal is de-asserted and provides the first power voltage to the bit line when the data signal is asserted. The BLSA receives a second power voltage as power supply. The BLSA provides the second power voltage to the bit line when the data signal and a wafer level burn-in test signal are both asserted. The second power voltage may be higher than the first power voltage. The wafer level burn-in test signal is asserted when the DRAM is in a wafer level burn-in test mode.
机译:提供了动态随机存取存储器(DRAM)和用于测试DRAM的方法。 DRAM包括存储单元,与该存储单元相关联的位线,本地缓冲器和位线感测放大器(BLSA)。本地缓冲器接收第一电源电压作为电源。当数据信号无效时,本地缓冲器将接地电压提供给位线,而当数据信号有效时,本地缓冲器将提供第一电源电压。 BLSA接收第二电源电压作为电源。当数据信号和晶圆级预烧测试信号均被认定时,BLSA将第二电源电压提供给位线。第二电源电压可以高于第一电源电压。当DRAM处于晶片级老化测试模式时,晶片级老化测试信号被断言。

著录项

  • 公开/公告号US2013021862A1

    专利类型

  • 公开/公告日2013-01-24

    原文格式PDF

  • 申请/专利权人 MIN-CHUNG CHOU;

    申请/专利号US201113185515

  • 发明设计人 MIN-CHUNG CHOU;

    申请日2011-07-19

  • 分类号G11C29/12;

  • 国家 US

  • 入库时间 2022-08-21 16:48:08

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