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Method and structure for PMOS devices with high K metal gate integration and SiGe channel engineering
Method and structure for PMOS devices with high K metal gate integration and SiGe channel engineering
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机译:具有高K金属栅极集成和SiGe通道工程的PMOS器件的方法和结构
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摘要
Various techniques for changing the workfunction of the substrate by using a SiGe channel which, in turn, changes the bandgap favorably for a p-type metal oxide semiconductor field effect transistors (pMOSFETs) are disclosed. In the various techniques, a SiGe film that includes a low doped SiGe region above a more highly doped SiGe region to allow the appropriate threshold voltage (Vt) for pMOSFET devices while preventing pitting, roughness and thinning of the SiGe film during subsequent cleans and processing is provided.
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