首页> 外国专利> METHOD OF DEPOSITING SINGLE BUFFER LAYER OF COATED CONDUCTOR AND THE COATED CONDUCTOR DEPOSITED BY THE METHOD

METHOD OF DEPOSITING SINGLE BUFFER LAYER OF COATED CONDUCTOR AND THE COATED CONDUCTOR DEPOSITED BY THE METHOD

机译:镀层导体的单缓冲层的沉积方法和沉积该方法的镀层导体

摘要

PURPOSE: A method of depositing a single buffer layer of a coated conductor and a coated conductor deposited by the method are provided to insert a thin CeO 2 nucleation layer deposited at a low deposition speed between a substrate and a CeO 2 epitaxial layer, thereby obtaining a low substrate temperature and a high speed deposition rate. CONSTITUTION: A method of depositing a single buffer layer of a coated conductor comprises the next step. CeO2 of the thickness of 3 to 100nm is deposited on a substrate, thereby forming a core forming layer. The CeO2 of the thickness of 10 to 500nm is deposited on the top of the core forming layer, thereby generating an epitaxial layer. A deposition is performed by a sputtering, a pulsed laser deposition or an electron beam deposition. The substrate is nickel or a nickel alloy. The nickel alloy contains cobalt(Co), chrome(Cr), vanadium(V), molybdenum(Mo), tungsten(W) or boron(B).
机译:目的:提供一种沉积涂覆导体的单个缓冲层的方法以及通过该方法沉积的涂覆导体,以在衬底和CeO 2外延层之间插入以低沉积速度沉积的薄CeO 2成核层,从而获得低的基板温度和高速的沉积速率。组成:一种沉积涂层导体的单个缓冲层的方法包括下一步。在基板上沉积厚度为3至100nm的CeO 2,从而形成芯形成层。在芯形成层的顶部上沉积厚度为10至500nm的CeO 2,从而产生外延层。通过溅射,脉冲激光沉积或电子束沉积进行沉积。基底是镍或镍合金。镍合金包含钴(Co),铬(Cr),钒(V),钼(Mo),钨(W)或硼(B)。

著录项

  • 公开/公告号KR101256370B1

    专利类型

  • 公开/公告日2013-04-25

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20100137654

  • 申请日2010-12-29

  • 分类号C23C14/06;H01B12/06;C01G1/02;

  • 国家 KR

  • 入库时间 2022-08-21 16:25:16

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