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Wafer assembly for use during manufacturing integrated switching circuits, has integrated circuits formed on process and carrier wafers bonded to process wafer, and adhesive layer bonding wafers, where carrier wafer includes alignment mark
Wafer assembly for use during manufacturing integrated switching circuits, has integrated circuits formed on process and carrier wafers bonded to process wafer, and adhesive layer bonding wafers, where carrier wafer includes alignment mark
The assembly (100) has integrated circuits formed on a process wafer (102) and a carrier wafer (104) bonded to the process wafer, where the carrier wafer has an alignment mark (106). A bonding adhesive layer bonds the process wafer and the carrier wafer. An epitaxial layer bonds the process wafer and the carrier wafer. The carrier wafer includes multiple alignment marks distributed at equal distance along circumference of the carrier wafer, where thickness of the process wafer is less than thickness of the carrier wafer. An independent claim is also included for a method for manufacturing integrated switching circuits.
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