首页> 外国专利> Wafer assembly for use during manufacturing integrated switching circuits, has integrated circuits formed on process and carrier wafers bonded to process wafer, and adhesive layer bonding wafers, where carrier wafer includes alignment mark

Wafer assembly for use during manufacturing integrated switching circuits, has integrated circuits formed on process and carrier wafers bonded to process wafer, and adhesive layer bonding wafers, where carrier wafer includes alignment mark

机译:用于制造集成开关电路的晶片组件,具有在工艺晶片上形成的集成电路和与工艺晶片粘合的载体晶片,以及粘合层粘合晶片,其中载体晶片包括对准标记

摘要

The assembly (100) has integrated circuits formed on a process wafer (102) and a carrier wafer (104) bonded to the process wafer, where the carrier wafer has an alignment mark (106). A bonding adhesive layer bonds the process wafer and the carrier wafer. An epitaxial layer bonds the process wafer and the carrier wafer. The carrier wafer includes multiple alignment marks distributed at equal distance along circumference of the carrier wafer, where thickness of the process wafer is less than thickness of the carrier wafer. An independent claim is also included for a method for manufacturing integrated switching circuits.
机译:组件(100)具有形成在处理晶片(102)上的集成电路和结合到处理晶片的载体晶片(104),其中载体晶片具有对准标记(106)。粘合粘合剂层将处理晶片和载体晶片粘合。外延层结合处理晶片和载体晶片。载体晶片包括沿着载体晶片的圆周以相等的距离分布的多个对准标记,其中处理晶片的厚度小于载体晶片的厚度。还包括用于制造集成开关电路的方法的独立权利要求。

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