Heterojunction field effect transistor, the method of manufacturing heterojunction field-effect transistor, and electronic equipment.

摘要

Low heterojunction field effect transistor, method of manufacturing a heterojunction field effect transistor, and [challenge] access resistance, on-resistance, etc. to provide an electronic device. [SOLUTION] on the substrate 10, the electron transit layer 11 is formed by group III nitride semiconductor, the upper surface of the electron transit layer 11, the electron supply layer 12 formed of a group III nitride semiconductor hetero junction, electrons the supply layer 12, a drain electrode 15B gate electrode 14, the source electrode 15A is arranged, At least a part of the lower electrode 15B of the drain and source electrodes 15A, and 13B and includes a n-type conductive layer region 13A reaches the electron supply layer 12 from the top surface 11 upper electron transit layer, In 11 parts electron transit layer 13B and n-type conductive layer region 13A, the heterojunction interface between the electron supply layer 12, a heterojunction, characterized in that it comprises a concentration of less than 1 × ¹⁰ 20 ^{cm -3} n-type impurity field-effect transistor.