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Power MOSFET having lateral channel, vertical current path, and P-region under gate for increasing breakdown voltage
Power MOSFET having lateral channel, vertical current path, and P-region under gate for increasing breakdown voltage
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机译:功率MOSFET具有横向沟道,垂直电流路径以及栅极下方的P区,用于增加击穿电压
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摘要
In one embodiment, a power MOSFET cell includes an N+ silicon substrate having a drain electrode. An N-type drift layer is grown over the substrate. An N-type layer, having a higher dopant concentration than the drift region, is then formed along with a trench having sidewalls. A P-well is formed in the N-type layer, and an N+ source region is formed in the P-well. A gate is formed over the P-well's lateral channel and has a vertical extension into the trench. A positive gate voltage inverts the lateral channel and increases the vertical conduction along the sidewalls to reduce on-resistance. A vertical shield field plate is also located next to the sidewalls and may be connected to the gate. The field plate laterally depletes the N-type layer when the device is off to increase the breakdown voltage. A buried layer and sinker enable the use of a topside drain electrode.
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