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MISCELLANEOUS LEGISLATION AND MISCELLANEOUS LEGISLATION INFORMATION IN MISCELLANEOUS CODE ORGANISATION

机译:杂项代码组织中的杂项立法和杂项立法信息

摘要

An embodiment represents a memory controllers ready. The memory controllers contains a memory controllers - control circuit, a fault imaging logic and an error correcting circuit. The memory controllers - control circuit, a code word read out from a memory device. The error image logic, a respective word line (wl) and a respective bit line (bl) for each bit in the code word at least partially on the basis of a memory device image identifying and at least partially on the basis of a fault image of determining whether an identified wl and / or a identified bl are defective. The error correcting circuit is intended to form a decoding device of the operation, if a identified wl and / or a identified bl are defective.
机译:一个实施例表示准备就绪的存储器控​​制器。存储器控制器包含一个存储器控制器-控制电路,故障成像逻辑和纠错电路。存储控制器-控制电路,从存储设备中读出的代码字。错误码逻辑,代码字中每个位的相应字线(wl)和位线(bl)至少部分基于识别的存储设备映像,至少部分基于故障映像确定所标识的wl和/或所标识的bl是否有缺陷的过程。如果所识别的wl和/或所识别的bl有缺陷,则纠错电路旨在形成操作的解码设备。

著录项

  • 公开/公告号DE102018213361A1

    专利类型

  • 公开/公告日2019-03-14

    原文格式PDF

  • 申请/专利权人 INTEL CORPORATION;

    申请/专利号DE201810213361

  • 发明设计人 RAVI MOTWANI;

    申请日2018-08-08

  • 分类号G11C29/42;

  • 国家 DE

  • 入库时间 2022-08-21 11:44:31

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