SELF-ALIGNED METHOD OF MAKING A TRANSISTOR WITH MULTIPLE NANOWIRE OR NANOSHEET CHANNELS, COMRPISING THE USE OF A SPACER COMPRISING EUV EXPOSED RESIST AS WELL AS NON-EXPOSED RESIST

摘要

A method (100) of forming aligned gates for horizontal nanowires or nanosheets, comprising: providing (110) a wafer which comprises at least one fin of sacrificial layers (4) alternated with functional layers (3), and a dummy gate (1) covering a section of the fin between a first end (21) and a second end (22); at least partly removing (120) the sacrificial layers (4) at the first end (21) and the second end (22) thereby forming a void between the functional layers at the first and end (21, 22) such that the void is partly covered by the dummy gate; providing (130) resist material which oxidizes upon EUV exposure; exposing (140) the wafer to EUV light; selectively removing part of the unexposed resist (6) and removing (150) the dummy gate and the unexposed resist (5); forming (160) a gate between the functional layers and between the remaining parts of exposed resist (6) at the first end (21) and at the second end (22).