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INSTRUCTION SET PROCESSING METHOD BASED ON A CHIP ARCHITECTURE AND APPARATUS, AND STORAGE MEDIUM
INSTRUCTION SET PROCESSING METHOD BASED ON A CHIP ARCHITECTURE AND APPARATUS, AND STORAGE MEDIUM
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机译:基于芯片架构和装置以及存储介质的指令集处理方法
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摘要
Embodiments of this application disclose an instruction set processing method based on a chip architecture and apparatus, and a computer-readable storage medium. The method includes compiling a deep learning model based on the architecture of the chip, to obtain a deep learning instruction set corresponding to the chip; compressing the deep learning instruction set, to obtain a compressed instruction set; and storing the compressed instruction set in an instruction set buffer of the chip by writing in a register, the compressed instructions executing a task.
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