Implementation of a High-Speed Numeric Function Generator on a COTS Reconfigurable Computer

摘要

Certain methods of realizing numeric functions, such as sin(x) or square root of x , in hardware involve a Taylor Series expansion or the CORDIC algorithm. These methods, while precise, are iterative and slow and may take on the order of hundreds to thousands of CPU clock cycles. A faster method involves a piecewise approximation to the function. The function value is computed by reading pre-calculated coefficients (slope and intercept for first order approximations). And then, by multiplying the function argument by the proper slope and adding the proper intercept, a close approximation to the function solution is produced. This thesis shows how this first order approximation technique was implemented on an FPGA-based COTS reconfigurable computer. MATLAB routines were developed to approximate the function as a set of consecutive, linear equations. The MATLAB approximation is combined with other modules designed in VHDL to construct an overall circuit. A pipelined circuit was created on the SRC-6E computer that reduces the latency of the sin(xx) function by over 88% and produces a result on each clock cycle. The circuit easily implements other functions by simply exchanging the approximation and coefficients. Thus, a user-friendly environment was created for calculating functions at higher speeds than the more popular current methods.