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Cell-based top-down design methodology for RSFQ digital circuits

机译:RSFQ数字电路的基于单元的自顶向下设计方法

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We propose a cell-based top-down design methodology for rapid single flux quantum (RSFQ) digital circuits. Our design methodology employs a binary decision diagram (BDD), which is currently used for the design of CMOS pass-transistor logic circuits. The main features of the BDD RSFQ circuits are the limited primitive number, dual rail nature, non-clocking architecture, and small gate count. We have made a standard BDD RSFQ cell library and prepared a top-down design CAD environment, by which we can perform logic synthesis, logic simulation, circuit simulation and layout view extraction. In order to clarify problems expected in large-scale RSFQ circuits design, we have designed a small RSFQ microprocessor based on simple architecture using our top-down design methodology. We have estimated its system performance and compared it with that of the CMOS microprocessor with the same architecture. It was found that the RSFQ system is superior in terms of the operating speed though it requires extremely large chip area. (C) 2001 Published by Elsevier Science B.V. [References: 17]
机译:我们为快速单通量量子(RSFQ)数字电路提出了一种基于单元的自顶向下设计方法。我们的设计方法采用了二进制决策图(BDD),该决策图目前用于CMOS传输晶体管逻辑电路的设计。 BDD RSFQ电路的主要特征是有限的原始数,双轨特性,非时钟架构和较小的门数。我们已经建立了一个标准的BDD RSFQ单元库,并准备了一个自顶向下的设计CAD环境,通过该环境我们可以执行逻辑综合,逻辑仿真,电路仿真和布局视图提取。为了弄清楚在大型RSFQ电路设计中可能出现的问题,我们使用自上而下的设计方法,基于简单的体系结构设计了小型RSFQ微处理器。我们已经估算了其系统性能,并将其与具有相同架构的CMOS微处理器进行了比较。已经发现,尽管RSFQ系统需要非常大的芯片面积,但是在操作速度方面是优越的。 (C)2001年由Elsevier Science B.V.出版[参考文献:17]

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