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INTERPOLATION OF DEPTH-3 ARITHMETIC CIRCUITS WITH TWO MULTIPLICATION GATES

机译:用两个乘法门对Depth-3算术电路进行插值

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In this paper we consider the problem of constructing a small arithmetic circuit for a polynomial for which we have oracle access. Our focus is on n-variate polynomials, over a finite field F, that have depth-3 arithmetic circuits (with an addition gate at the top) with two multiplication gates of degree at most d. We obtain the following results: 1. Multilinear case. When the circuit is multilinear (multiplication gates compute multilinear polynomials) we give an algorithm that outputs, with probability 1 - o(1), all the depth-3 circuits with two multiplication gates computing the polynomial. The running time of the algorithm is poly(n, |F|). 2. General case. When the circuit is not multilinear we give a quasi-polynomial (in n, d, |F|) time algorithm that outputs, with probability 1-o(1), a succinct representation of the polynomial. In particular, if the depth-3 circuit for the polynomial is not of small depth-3 rank (namely, after removing the g.c.d. (greatest common divisor) of the two multiplication gates, the remaining linear functions span a not too small linear space), then we output the depth-3 circuit itself. In the case that the rank is small we output a depth-3 circuit with a quasi-polynomial number of multiplication gates. Prior to our work there have been several interpolation algorithms for restricted models. However, all the techniques used there completely fail when dealing with depth-3 circuits with even just two multiplication gates.Our proof technique is new and relies on the factorization algorithm for multivariate black-box polynomials, on lower bounds on the length of linear locally decodable codes with two queries, and on a theorem regarding the structure of identically zero depth-3 circuits with four multiplication gates.
机译:在本文中,我们考虑了为具有oracle访问权限的多项式构造小型算术电路的问题。我们的重点是在有限域F上的n变量多项式,该多项式具有深度为3的算术电路(顶部为加法门),且两个乘法门的总和为d。我们得到以下结果:1.多线性情况。当电路是多线性的(乘法门计算多项式多项式)时,我们给出一种算法,该算法以1-o(1)的概率输出所有具有两个乘法门的深度为3的电路来计算多项式。该算法的运行时间为poly(n,| F |)。 2.一般情况。当电路不是多线性时,我们给出准多项式(以n,d,| F |表示)时间算法,该算法以概率1-o(1)输出多项式的简洁表示。特别是,如果用于多项式的深度3电路的深度3等级不小(即,去除两个乘法门的gcd(最大公约数)后,其余线性函数的线性空间就不会太小) ,然后输出depth-3电路本身。在等级较小的情况下,我们输出深度为3的电路,其乘数门为准多项式。在我们的工作之前,已经有几种用于受限模型的插值算法。但是,即使使用只有两个乘法门的深度3电路,此处使用的所有技术也会完全失败。我们的证明技术是新技术,它依赖于多元黑盒多项式的因式分解算法,线性局部长度的下限具有两个查询的可解码代码,以及关于具有四个乘法门的相同零深度3电路的结构的一个定理。

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