Technologies for the fabrication of nanoscale superconducting circuits

摘要

Researches on the fabrication of similar to 0.1 x 0.1 mu m(2) superconductor-insulator-superconductor (SIS) Josephson junctions are reviewed. Today, a typical dimension is 1-10 mu m for Josephson junctions in superconducting integrated circuits. These Josephson junctions are defined by well-established photolithographic technology with reactive ion etching (RIE), and for the superconductor, Nb is almost always used. The merits of Nb include the facts that the superconducting transition temperature T-c of Nb (9.2 K) is higher than the boiling point of He (4.2 K), and that Nb has excellent stability against thermal cycling between room temperature and liquid-He temperature. For the fabrication of similar to 0.1 x 0.1 mu m(2) junctions, on the other hand, there is a standard process with electron-beam lithography, shadow evaporation, and lift-off. This process works well for Al (T-c = 1.2 K), however, it is not ideal for Nb. The scope of this brief review is the nanoscale junction with Nb electrodes. We will look at the efforts of optimizing the standard lift-off process for Nb, electron-beam-lithographic versions of the Nb Josephson-junction technology, focused-ion-beam (FIB) etching as a convenient alternative to electron-beam lithography and RIE, etc. In order to characterize nanoscale tunnel junctions, the single-charge transistor has been often fabricated. Therefore, a summary of its theoretical transport proper-ties is also included.