FPGA Implementation of an LUT Adaptive Filter Using Distributed Arithmetic for the Segmentation of Real Time HD Video

摘要

Background recognition is a common feature in countless video processing arrangements such as automatic video surveillance arrangement for object detection, vehicle pursuing, noticing of unwanted cell in health biology etc. Image segmentation is used for the background identification. There are various techniques involved to process this segmentation. Background subtraction algorithm for image segmentation has different methods. In this project, the first method is to find the frame difference between the two different frames. The second method is to check with the median filter and the third method is to try with Gaussian Mixture Model for sample video player. Finally, the deblocking filter is designed with Verilog coding for background identification. Then, comparing the results of Gaussian Mixture Model and deblocking filter output model for the further work. In future, the addition of Distributed Arithmetic method is to reduce the area, power in the FPGA implementation.