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Metal contact engineering and registration-free fabrication of complementary metal-oxide semiconductor integrated circuits using aligned carbon nanotubes

机译:使用对准的碳纳米管进行金属接触工程和互补金属氧化物半导体集成电路的免配准制造

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摘要

Complementary metal-oxide semiconductor (CMOS) operation is very desirable for logic circuit applications as it offers rail-to-rail swing, larger noise margin, and small static power consumption. However, it remains to be a challenging task for nanotube-based devices. Here in this paper, we report our progress on metal contact engineering for n-type nanotube transistors and CMOS integrated circuits using aligned carbon nanotubes. By using Pd as source/drain contacts for p-type transistors, small work function metal Gd as source/drain contacts for n-type transistors, and evaporated SiO_2 as a passivation layer, we have achieved n-type transistor, PN diode, and integrated CMOS inverter with an air-stable operation. Compared with other nanotube n-doping techniques, such as potassium doping, PEI doping, hydrazine doping, etc., using low work function metal contacts for n-type nanotube devices is not only air stable but also integrated circuit fabrication compatible. Moreover, our aligned nanotube platform for CMOS integrated circuits shows significant advantage over the previously reported individual nanotube platforms with respect to scalability and reproducibility and suggests a practical and realistic approach for nanotube-based CMOS integrated circuit applications.
机译:互补金属氧化物半导体(CMOS)操作非常适合逻辑电路应用,因为它具有轨到轨摆幅,较大的噪声容限和较小的静态功耗。然而,对于基于纳米管的器件而言,这仍然是一项具有挑战性的任务。在本文中,我们报告了在使用取向碳纳米管的n型纳米管晶体管和CMOS集成电路的金属接触工程方面的进展。通过将Pd用作p型晶体管的源极/漏极触点,使用小功函数金属Gd作为n型晶体管的源极/漏极触点以及蒸发的SiO_2作为钝化层,我们获得了n型晶体管,PN二极管和集成CMOS逆变器,运行稳定。与钾掺杂,PEI掺杂,肼掺杂等其他纳米管n掺杂技术相比,将低功函数金属触点用于n型纳米管器件不仅具有空气稳定性,而且与集成电路制造兼容。此外,我们针对CMOS集成电路的对齐纳米管平台在可扩展性和可再现性方面显示出优于先前报道的单个纳米管平台的显着优势,并为基于纳米管的CMOS集成电路应用提出了一种切实可行的方法。

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