Hardware implementation and laboratory performances of X-band nano satellite high-speed downlink receiver based on turbo equalizer/decoder

摘要

A high speed downlink communication system is desired for future different applications using nano satellites. We have developed an X-band downlink system for nano satellite employing Consultative Committee for Space Data Systems (CCSDS) 131.2-B-1 signaling formats with a modulation symbol rate of 100 Msps. A compact high efficiency transmitter for wideband satellite communications must be implemented. Some of the tradeoffs cause significant degradation in performances. To overcome the performance loss, a memoryless channel predistortion scheme at the transmitter and a turbo equalizer/decoder has been developed at the receiver. The receiver algorithms are now refined as fixed-point algorithms for a field programmable gate array (FPGA) implementation. Performances of a prototype receiver are evaluated from measured and simulated input IF signals. The details of the receiver implementation and performance analyses are presented in this paper.