Cell Design Methodology Based on Transmission Gate for Low-Power High-Speed Balanced XOR-XNOR Circuits in Hybrid-CMOS Logic Style

摘要

In this paper, we propose a systematic design methodology based on transmission gate in the category of hybrid-CMOS Logic style. We start by with selecting a basic cell including two independent inputs and two complementary outputs. Next, we combine this basic cell with various correction techniques to build a perfect XOR-XNOR circuit. Cell design Methodology based on pass transistor has been previously published. Using transmission gate in the basic cells, in addition to providing Full-Swing outputs, increases circuit driving capability and eliminates needing for optimization techniques. Full-Swing outputs as an important factor in arithmetic circuit basic block design impact multi-stage structured arithmetic circuit performance. We have introduced six new balanced XOR-XNOR circuits in this paper. All of the proposed circuits successfully operate at low voltages with excellent signal integrity and driving capability. Afterwards five new full adders based on the novel XOR-XNOR circuits that generate XOR and XNOR full-swing outputs simultaneously have been proposed. All simulations have been performed with TSMC 0.13-μm using HSpice to achieve the minimum power and power-delay product (PDP). To evaluate the performance of the XOR/XNOR circuits in a real circuit, we have embedded them in individual, chain, tree structured and compressor 5:2 as test benches. Simulation results show that the proposed circuits exhibit better performances compared to previously suggested circuits. The savings range in the PDP from 23% to 56% and in power from 20% to 27% for more realistic test benches.