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首页> 外文期刊>Journal of instrumentation: an IOP and SISSA journal >A high-throughput readout architecture based on PCI-Express Gen3 and DirectGMA technology
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A high-throughput readout architecture based on PCI-Express Gen3 and DirectGMA technology

机译:基于PCI-Express Gen3和DirectGMA技术的高通量读取架构

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摘要

Modern physics experiments produce multi-GB/s data rates. Fast data links and high performance computing stages are required for continuous data acquisition and processing. Because of their intrinsic parallelism and computational power, GPUs emerged as an ideal solution to process this data in high performance computing applications. In this paper we present a high-throughput platformbased on direct FPGA-GPU communication. The architecture consists of a Direct Memory Access (DMA) engine compatible with the Xilinx PCI-Express core, a Linux driver for register access, and high- level software to manage direct memory transfers using AMD's DirectGMA technology. Measurements with a Gen3 x8 link show a throughput of 6.4 GB/s for transfers to GPU memory and 6.6 GB/s to system memory. We also assess the possibility of using the architecture in low latency systems: preliminary measurements show a round-trip latency as low as 1 μs for data transfers to system memory, while the additional latency introduced by OpenCL scheduling is the current limitation for GPU based systems. Our implementation is suitable for real-time DAQ system applications ranging from photon science and medical imaging to High Energy Physics (HEP) systems.
机译:现代物理学实验产生了数GB / s的数据速率。连续数据采集和处理需要快速数据链接和高性能计算阶段。由于其固有的并行性和计算能力,GPU成为在高性能计算应用程序中处理此数据的理想解决方案。在本文中,我们提出了一种基于直接FPGA-GPU通信的高吞吐量平台。该架构包括与Xilinx PCI-Express内核兼容的直接内存访问(DMA)引擎,用于寄存器访问的Linux驱动程序以及使用AMD DirectGMA技术管理直接内存传输的高级软件。使用Gen3 x8链接进行的测量显示,传输到GPU内存的吞吐量为6.4 GB / s,传输到系统内存的吞吐量为6.6 GB / s。我们还评估了在低延迟系统中使用该体系结构的可能性:初步测量显示,将数据传输到系统内存的往返延迟低至1μs,而OpenCL调度引入的额外延迟是基于GPU的系统的当前限制。我们的实现适合从光子科学和医学成像到高能物理(HEP)系统的实时DAQ系统应用。

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