IEDM Focus: Metal Gates/High-k for 45 nm

摘要

Intel (Santa Clara, Calif.) and IBM (Yorktown Heights, N.Y.) made news in January when both companies announced that they would be putting metal gate and high-k gate dielectrics into production by the end of the year for the 45 nm device generation. The main reason for doing so? Out of control leakage currents that sap power and generate excessive heat. Traditional gate dielectrics — primarily silicon dioxide — have to be incredibly thin to maximize capacitive coupling from the gate to the channel to keep drive currents high. They measure only 1.2 nm thick, the equivalent of about four atoms, and have reached the limit — any thinner would result in high leakage current. High-k offers a way to move to a thicker material, which helps reduce leakage while good capacitive coupling remains. Metal gates offer some performance advantages in their own right, but are a required companion for high-k films because of problems at the high-k/silicon interface.