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机译:编译器辅助的体系结构探索框架,用于粗粒度可重构阵列
VLSI Design Laboratory Electrical and Computer Engineering Department. University of Patras, Patras Greece;
Department of Computer Engineering and Informatics, University of Patras, Patras, Greece;
VLSI Design Laboratory, Electrical and Computer Engineering Department. University of Patras, Patras, Greece;
VLSI Design Laboratory, Electrical and Computer Engineering Department. University of Patras, Patras, Greece;
modulo scheduling; coarse-grained reconfigurable arrays; architectural exploration; high productivity tools; compiler techniques;
机译:编译器辅助的体系结构探索框架,用于粗粒度可重构阵列
机译:粗粒度间可重配置体系结构重配置技术,可在基于粗粒度可重配置体系结构的多核体系结构上有效地流化内核流
机译:针对通用可重配置阵列架构的优化编译器方法的设计空间探索
机译:粗粒度可重配置阵列的OpenCL编译器框架的设计评估
机译:CGRA的完全流水线且可动态组合的体系结构(粗粒度可重构体系结构)
机译:通过结构粗晶体理解无机和混合框架的几何多样性
机译:粗粒度可重构数组的编译框架