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首页> 外文期刊>Japanese journal of applied physics >Normally-Off AIGaN/GaN Metal-Oxide-Semiconductor Heterostructure Field-Effect Transistor with Recessed Gate and p-GaN Back-Barrier
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Normally-Off AIGaN/GaN Metal-Oxide-Semiconductor Heterostructure Field-Effect Transistor with Recessed Gate and p-GaN Back-Barrier

机译:具有凹入式栅极和p-GaN背势垒的常关型AIGaN / GaN金属氧化物半导体异质结构场效应晶体管

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摘要

The recessed-gate AIGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors (MOSHFETs) with a p-GaN back-barrier studied in this work exhibited much lower buffer leakage current than those without the back-barrier. The threshold voltage of the device with the p-GaN back-barrier was controlled by varying the depth of gate recess etching, and a value as high as 2.9 V was obtained with deep gate-recess etching into the channel layer. The device structure has the advantage of both low leakage current and high threshold voltage, which is important for power-switching applications. In contrast, the performance parameters of the device, such as subthreshold slope and field-effect mobility, can be degraded owing to increased plasma damage with increasing recess depth.
机译:在这项工作中研究的具有p-GaN背栅的凹栅AIGaN / GaN金属氧化物半导体异质结构场效应晶体管(MOSHFET)的缓冲漏电流要比没有背栅的缓冲漏电流低得多。通过改变栅极凹槽蚀刻的深度来控制具有p-GaN背势垒的器件的阈值电压,通过对沟道层进行深度栅极凹槽蚀刻,可以获得高达2.9 V的值。器件结构具有低泄漏电流和高阈值电压的优点,这对于电源开关应用很重要。相反,由于随着凹槽深度的增加,等离子体损伤的增加,该设备的性能参数,例如亚阈值斜率和场效应迁移率可能会降低。

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  • 来源
    《Japanese journal of applied physics》 |2012年第3issue1期|p.034101.1-034101.5|共5页
  • 作者单位

    School of Electrical Engineering and Computer Science, Kyungpook National University, Daegu 702-701, Korea;

    School of Electrical Engineering and Computer Science, Kyungpook National University, Daegu 702-701, Korea;

    School of Electrical Engineering and Computer Science, Kyungpook National University, Daegu 702-701, Korea;

    School of Electrical Engineering and Computer Science, Kyungpook National University, Daegu 702-701, Korea;

    School of Electrical Engineering and Computer Science, Kyungpook National University, Daegu 702-701, Korea,Convergence Components and Materials Research Laboratory, Electronics and Telecommunications Research Institute, Daejeon 305-700, Korea;

    Convergence Components and Materials Research Laboratory, Electronics and Telecommunications Research Institute, Daejeon 305-700, Korea;

    Convergence Components and Materials Research Laboratory, Electronics and Telecommunications Research Institute, Daejeon 305-700, Korea;

    School of Electrical Engineering and Computer Science, Kyungpook National University, Daegu 702-701, Korea;

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