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机译:用于3D IC集成的盲孔硅通孔(TSV)的电气测试方法
Electronics and Optoelectronics Research Laboratories, Industrial Technology Research Institute (ITRI) Chutung, Hsinchu, Taiwan,Department of Electrical Engineering, National Central University, Taiwan;
Electronics and Optoelectronics Research Laboratories, Industrial Technology Research Institute (ITRI) Chutung, Hsinchu, Taiwan;
Electronics and Optoelectronics Research Laboratories, Industrial Technology Research Institute (ITRI) Chutung, Hsinchu, Taiwan;
Electronics and Optoelectronics Research Laboratories, Industrial Technology Research Institute (ITRI) Chutung, Hsinchu, Taiwan;
Electronics and Optoelectronics Research Laboratories, Industrial Technology Research Institute (ITRI) Chutung, Hsinchu, Taiwan;
Electronics and Optoelectronics Research Laboratories, Industrial Technology Research Institute (ITRI) Chutung, Hsinchu, Taiwan,Department of Electrical Engineering, National Central University, Taiwan;
Electronics and Optoelectronics Research Laboratories, Industrial Technology Research Institute (ITRI) Chutung, Hsinchu, Taiwan;
Electronics and Optoelectronics Research Laboratories, Industrial Technology Research Institute (ITRI) Chutung, Hsinchu, Taiwan;
Electronics and Optoelectronics Research Laboratories, Industrial Technology Research Institute (ITRI) Chutung, Hsinchu, Taiwan;
Department of Electrical Engineering, National Central University, Taiwan;
Electronics and Optoelectronics Research Laboratories, Industrial Technology Research Institute (ITRI) Chutung, Hsinchu, Taiwan;
Electronics and Optoelectronics Research Laboratories, Industrial Technology Research Institute (ITRI) Chutung, Hsinchu, Taiwan;
Electronics and Optoelectronics Research Laboratories, Industrial Technology Research Institute (ITRI) Chutung, Hsinchu, Taiwan;
3D IC integration; through silicon via (TSV); TSV electrical testing method and guidelines;
机译:氧化物衬里,阻挡层和种子层以及用于3D IC集成的300毫米晶圆上盲孔硅通孔(TSV)的铜镀层
机译:审查中的标题为“通过硅通孔(TSV)进行电气测试的系统和方法”的专利申请
机译:一种新型的中介层的制造和电学特性,该中介层具有用于2.5D / 3D应用的具有超低电阻率的直通硅通孔(TSV)的聚合物衬里和硅柱
机译:用于3D IC集成的盲孔硅通孔(TSV)的电气测试方法
机译:三维(3D)集成中的直通孔(TSV)的电气评估和建模。
机译:使用使用AuPdPtCu和IR和IR和IR的MACE方法自对准高纵横比硅3D结构的晶圆级集成
机译:3D硅直通孔(TSV)对通孔挤出的处理效果互连:两种TSV结构的比较研究