A new two-step single slope A/D converter for using in CMOS image sensors

摘要

This paper presents a high-speed, high-resolution column parallel analog-to-digital converter (ADC) with global digital error correction. Proposed A/D converter is suitable for using in high-frame-rate complementary metal-oxide-semiconductor (CMOS) image sensors. This new method has more advantages than conventional ramp ADC from viewpoint of speed and resolution. A prototype 11-bit ADC is designed in 0.25-μm CMOS technology. Moreover, an overall signal-to-noise ratio of 63.8 dB can be achieved at 0.5Msample/s. The power dissipation of all 320 column-parallel ADCs with the peripheral circuits consume 76 mW at 2.5-V supplies.