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Analysis and design of LC oscillators associated with frequency multipliers: a phase noise perspective

机译:与倍频器相关的LC振荡器的分析和设计:相位噪声的观点

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When a local oscillator signal generation system is based on an LC oscillator and a frequency multiplier, the question of determining the optimal multiplication factor is a key issue. In this paper, the problem is addressed in order to minimize the 1/f(2) phase noise within a tuning range constraint. The analysis, with a practical graphical representation, reveals the oscillator phase noise dependence on the oscillating frequency in the transition from two different regimes, named the inductor-limited quality factor and the capacitor-limited quality factor. The results obtained enable the evaluation of the phase noise performance of systems based on a sub-harmonic and super-harmonic oscillators and how they compare with an oscillator in the fundamental mode. Crucial questions like the phase noise improvement that these systems can achieve are analytically answered. A design methodology is thus proposed and verified through measurements on a frequency source at 31GHz, composed by a sub-harmonic voltage-controlled oscillator followed by an injection-locked frequency tripler, dedicated to backhauling applications, designed on a BiCMOS process technology. The tuning range is 10%, and the phase noise at a 1-MHz offset is -112dBc/Hz. Copyright (c) 2017 John Wiley & Sons, Ltd.
机译:当本地振荡器信号生成系统基于LC振荡器和倍频器时,确定最佳乘法因子的问题是关键问题。在本文中,为了在调整范围约束内将1 / f(2)相位噪声降至最低,解决了该问题。该分析用实际的图形表示法揭示了振荡器相位噪声在两个不同状态(称为电感器限制品质因数和电容器限制品质因数)的过渡中对振荡频率的依赖性。获得的结果使得能够评估基于次谐波和超谐波振荡器的系统的相位噪声性能,以及它们如何与基本模式的振荡器进行比较。这些系统可以实现的诸如相位噪声改善之类的关键问题都得到了分析解答。因此,提出了一种设计方法,并通过在31GHz频率源上的测量进行了验证,该方法由基于BiCMOS工艺技术设计的次谐波压控振荡器和注入锁定倍频器组成,后者专门用于回程应用。调谐范围为10%,偏移为1 MHz时的相位噪声为-112dBc / Hz。版权所有(c)2017 John Wiley&Sons,Ltd.

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