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Reverse current reduction of Ge pin photodiodes on Si without post-growth annealing

机译:无需后生长退火即可降低Si上Ge引脚光电二极管的反向电流

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摘要

A new approach to reduce the reverse current of Ge pin photodiodes on Si is presented, in which an i-Si layer is inserted between Ge and top Si layers to reduce the electric field in the Ge layer. Without post-growth annealing, the reverse current density is reduced to ~10 mA/cm~2 at -1 V, i.e. one order of magnitude lower than that of the reference photodiode without i-Si layer. The responsivity of the Ge photodiode reaches the nearly theoretical maximum. This "non-thermal" approach to reduce reverse current should accelerate electronics-photonics convergence using Ge on the Si CMOS platform.
机译:提出了一种减少Si上Ge引脚光电二极管反向电流的新方法,其中在Ge和顶部Si层之间插入一个i-Si层以减小Ge层中的电场。如果不进行后生长退火,则反向电流密度在-1 V时降低至〜10 mA / cm〜2,即比不具有i-Si层的参考光电二极管低一个数量级。 Ge光电二极管的响应度几乎达到理论最大值。这种减少反向电流的“非热”方法应在Si CMOS平台上使用Ge加速电子-光子的融合。

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  • 来源
    《電子情報通信学会技術研究報告》 |2009年第419期|p.11-15|共5页
  • 作者单位

    Department of Materials Engineering, Graduate School of Engineering The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan;

    Department of Materials Engineering, Graduate School of Engineering The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan;

    Department of Materials Engineering, Graduate School of Engineering The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan;

    Department of Materials Engineering, Graduate School of Engineering The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan;

    Department of Materials Engineering, Graduate School of Engineering The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan;

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