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Sneak-Path Testing of Crossbar-Based Nonvolatile Random Access Memories

机译:基于交叉开关的非易失性随机访问存储器的潜行测试

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摘要

Emerging nonvolatile memory (NVM) technologies, such as resistive random access memories (RRAM) and phase-change memories (PCM), are an attractive option for future memory architectures due to their nonvolatility, high density, and low-power operation. Notwithstanding these advantages, they are prone to high defect densities due to the nondeterministic nature of the nanoscale fabrication. We examine the fault models and propose an efficient testing technique to test crossbar-based NVMs. The typical approach to testing memories entails testing one memory element at a time. This is time consuming and does not scale for the dense, RRAM or PCM-based memories. We propose a testing scheme based on “sneak-path sensing” to efficiently detect faults in the memory. The testing scheme uses sneak paths inherent in crossbar memories, to test multiple memory elements at the same time, thereby reducing testing time. We designed the design-for-test support necessary to control the number of sneak paths that are concurrently enabled; this helps control the power consumed during test. The proposed scheme enables and leverages sneak paths during test mode, while still maintaining a sneak path free crossbar during normal operation.
机译:电阻性随机存取存储器(RRAM)和相变存储器(PCM)等新兴的非易失性存储器(NVM)技术因其非易失性,高密度和低功耗操作而成为未来存储器体系结构的诱人选择。尽管具有这些优点,但是由于纳米级制造的不确定性,它们易于产生高缺陷密度。我们检查故障模型并提出一种有效的测试技术来测试基于交叉开关的NVM。测试内存的典型方法是一次测试一个内存元素。这是费时的,并且不能扩展用于基于RRAM或PCM的密集存储器。我们提出了一种基于“潜行路径检测”的测试方案,以有效地检测内存中的故障。该测试方案使用纵横制存储器固有的潜行路径,以同时测试多个存储元件,从而减少了测试时间。我们设计了必要的测试设计支持,以控制同时启用的潜行路径的数量。这有助于控制测试期间消耗的功率。所提出的方案在测试模式下启用并利用了潜行路径,同时在正常操作期间仍保持了潜行路径的交叉开关。

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