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Using Embedded Dynamic Random Access Memory to Reduce Energy Consumption of Magnetic Recording Read Channel

机译:使用嵌入式动态随机存取存储器减少磁记录读取通道的能耗

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摘要

Although the performance of a magnetic recording read channel can be improved by employing advanced iterative signal detection and coding techniques, the method nevertheless tends to incur significant silicon area and energy consumption overhead. Motivated by recent significant improvement of high-density embedded dynamic random access memory (eDRAM) towards high manufacturability at low cost, we explored the potential of integrating eDRAM in read channel integrated circuits (IC) to minimize the silicon area and energy consumption cost incurred by iterative signal detection and coding. As a result of the memory-intensive nature of iterative signal detection and coding algorithms, the silicon cost can be reduced in a straightforward manner by directly replacing conventional SRAM with eDRAM. However, reducing the energy consumption may not be trivial. In this paper, we present two techniques that trade eDRAM storage capacity to reduce the energy consumption of iterative signal detection and coding datapath. We have demonstrated dDRAM's energy saving potential by designing a representative iterative read channel at the 65 nm technology node. Simulation shows that we can eliminate over 99.99% of post-processing computation for dominant error events detection, and achieve up to a 67% reduction of decoding energy consumption.
机译:尽管可以通过采用先进的迭代信号检测和编码技术来改善磁记录读取通道的性能,但是该方法仍倾向于引起大量的硅面积和能量消耗开销。受到最近高密度嵌入式动态随机存取存储器(eDRAM)向低成本,高可制造性的重大改进的推动,我们探索了将eDRAM集成到读取通道集成电路(IC)中的潜力,以最大程度地减少硅面积和能耗成本。迭代信号检测和编码。由于迭代信号检测和编码算法的内存密集型性质,可以通过直接用eDRAM代替传统的SRAM来直接降低硅成本。但是,降低能耗可能并非易事。在本文中,我们提出了两种交换eDRAM存储容量以减少迭代信号检测和编码数据路径能耗的技术。通过在65 nm技术节点上设计一个代表性的迭代读取通道,我们已经证明了dDRAM的节能潜力。仿真表明,我们可以消除99.99%以上的后处理计算量,以进行主要错误事件检测,并减少多达67%的解码能耗。

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