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A new low-noise logic family for mixed-signal integrated circuits

机译:用于混合信号集成电路的新型低噪声逻辑系列

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摘要

A new low-noise logic family is presented in which the supply current spikes due to switching are much reduced with respect to conventional CMOS circuits. A comparison with existing alternative circuits shows that, for the same supply voltage and the same power consumption, the new circuits have smaller area, higher noise margins, and lower delay
机译:提出了一种新的低噪声逻辑系列,其中相对于常规CMOS电路,由于开关引起的电源电流尖峰大大降低了。与现有替代电路的比较表明,对于相同的电源电压和相同的功耗,新电路具有更小的面积,更高的噪声容限和更低的延迟。

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