A GENERIC ARCHITECTURE FOR HIGH-ORDER SIGMA-DELTA MODULATORS

摘要

In this paper, a generic architecture associated with a systematic design method is proposed for the design of high-order sigma-delta modulators. The goal of this approach is to determine the values of loop coefficients of a modulator with limited coefficient ratio to reduce the chip size of the modulator, while achieving high signal-to-noise ratio (SNR) and a wide range of maximum dc input levels. Simulation results show that, based on the proposed architecture and design method, the designed circuits increase the range of maximum dc input levels 1.6 to three times greater than conventional circuits. Simulation results show that the proposed architectures attains a minimum of 110-dB SNR for circuits with order higher than four, as tested over a 20 kHz audio bandwidth at a sampling rate 2.56 MHz.