Implementation of I²C Master Bus Protocol on FPGA

摘要

The focus of this paper is on I²C (Inter-Integrated Circuit) protocol interface between Master Bus protocol and slave. Here we are interfacing between micro-controller and DS1307. I²C bus protocol sends 8 bit data from micro-controller to DS1307. This module was designed in VHDL and simulated and synthesized using Xilinx ISE Design Suite 14.2. I²C and optimized for area and power. This concept is widely applicable from any high speed device or low speed device to any low speed device or high speed device. This module acts as a slave for the DS1307 at the same time acts like a master for the micro-controller device which can be considered as a slave. . It can be used to interface low speed peripherals like motherboard, embedded system, mobile phones, set top boxes, DVD, PDA's or other electronic devices.