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Design and FPGA implementation of digital pulse compression for HF chirp radar based on modified orthogonal transformation

机译:基于改进正交变换的HF线性调频雷达数字脉冲压缩设计与FPGA实现

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References(10) Cited-By(3) The paper presents a digital pulse compression approach for high frequency (HF) chirp radar. The emphasis is to accomplish echo signal de-chirp operation by modified orthogonal transformation on field programmable gates array (FPGA) chip. This approach has been developed for an all-digital receiver platform which is directly radio frequency (RF) band-pass sampling, compared with the traditional analog receiver or intermediate frequency (IF) receiver, it has an easy hardware structure closing to a “soft” radar mode. The system closed-loop test shows the correctness and rationality of the design, meeting the demand of engineering application.
机译:参考文献(10)Cited-By(3)本文提出了一种用于高频(HF)线性调频雷达的数字脉冲压缩方法。重点是通过在现场可编程门阵列(FPGA)芯片上进行改进的正交变换来完成回声信号去-操作。这种方法是为全数字接收器平台开发的,该平台直接进行射频(RF)带通采样,与传统的模拟接收器或中频(IF)接收器相比,它具有易于接近“软”的硬件结构。雷达模式。系统闭环测试表明了设计的正确性和合理性,满足了工程应用的需求。

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