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A CMOS voltage controlled oscillator topology for suppression of flicker noise up-conversion

机译:用于抑制闪烁噪声上变频的CMOS压控振荡器拓扑

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摘要

References(8) A CMOS voltage controlled oscillator (VCO) topology is proposed to suppress the flicker noise up-conversion, thus improving its close-in phase noise performance. The idea is based on a previous work relying on insertion of resistors in series with the conducting channel resistors of the complementary cross coupled pairs. The immunity of the loaded quality factor (Q) to the conducting channel resistors which are modulated by their flicker noise is enhanced, thus reducing the flicker noise up-conversion gain. In the proposed topology, the VCO oscillation amplitude is not degraded and the resistance is never constrained by the threshold voltage, which are problems of the previous topology. Meanwhile the number of resistors is halved, lowering circuit complexity. Two VCOs based on the previous topology and the proposed topology are designed in a 65nm CMOS process. Simulation results show the phase noise of the proposed VCO is improved by more than 4dB at 1kHz offset frequency and 2dB at 10kHz offset frequency over the whole 2.85GHz to 3.75GHz tuning range.
机译:参考文献(8)提出了一种CMOS压控振荡器(VCO)拓扑结构来抑制闪烁噪声上变频,从而改善其近相噪声性能。该想法基于先前的工作,该工作依赖于与互补交叉耦合对的导电通道电阻串联的电阻的插入。负载质量因数(Q)对通过其闪烁噪声调制的导电通道电阻的抗扰性得到增强,从而降低了闪烁噪声的上转换增益。在提出的拓扑中,VCO振荡幅度不会降低,并且电阻不会受到阈值电压的限制,这是先前拓扑的问题。同时,电阻器的数量减半,降低了电路复杂度。在65nm CMOS工艺中设计了两个基于先前拓扑和拟议拓扑的VCO。仿真结果表明,在整个2.85GHz至3.75GHz的调谐范围内,所提出的VCO的相位噪声在1kHz偏移频率下改善了4dB以上,在10kHz偏移频率下改善了2dB。

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