SHORT OUTLINE OF SILICON MOS-LIKE STRUCTURES FABRICATION TECHNIQUES, CVC AND NOISE MEASUREMENTS

摘要

ThemaintrendsindevelopmentofmodernICs(particularlyemployingMOS/CMOSstructures)arerelatedwithdecreasingoftheintegratedstructures’geometricalsizes,increasingoftheintegrationdensity,decreasingofthepowerconsumption,andincreasingofthesignaloiseratio.Asthewantedsignallevelisimpossibletoincreaseuptosomecertaincriticallevel,thereisaneedtodecreaseinternalnoiselevel.Inordertotackletheproblemseveralmethodsareinuse.Recently,avariationofMOSstructuresgatematerials’compositionandstructurehasbeensuccessfullyutilized[1].Inthisarticlewepresentashortoutlineoffabricationtechnology,peculiaritiesofthecurrent-voltagecharacteristics(CVC),andlow-frequencynoisesofexperimentalsamplesofsiliconMOS-likestructureswithtungsten(W),chromium(Cr),andiron(Fe)metalliccontacts,whichwerepreparedtoestimateimpactofphononsinterfacepercolationdynamicson1/fnoiseinsemiconductormicro-andopto-electronicdevices[2,3].