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Dielectric/metal sidewall diffusion barrier for Cu/porous ultralow-k interconnect technology

机译:用于铜/多孔超低k互连技术的介电/金属侧壁扩散阻挡层

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摘要

With the acknowledged insufficiency of traditional Ta or TaN barriers, deposited by physical vapor deposition (PVD), in the Cu/porous ultralow-k intermetal dielectric integration, an amorphous hydrogenated SiC (a-SiC:H)/Ta bilayer sidewall diffusion barrier has been fabricated using 0.13 μm Cu/porous ultralow-k [Porous-SiLK (Proprietary product from Dow Chemical Corporation, USA), k~2.2] single damascene process. The electrical tests show that the line-to-line leakage current and the electrical breakdown field (E_(BD)) of samples with this a-SiC:H/Ta dielectric/metal bilayer structure are significantly improved compared to the conventional PVD multi-stacked Ta(N) sidewall barrier. This improvement is mostly due to surface roughness modification after the deposition of a-SiC:H film, which, in addition to being a good barrier to Cu diffusion, can effectively "seal" the weak points on the surface of porous low-k material that are responsible for the sidewall barrier failure.
机译:由于公认的通过物理气相沉积(PVD)沉积的传统Ta或TaN阻挡层不足,在Cu /多孔超低k金属间电介质集成中,非晶氢化SiC(a-SiC:H)/ Ta双层侧壁扩散阻挡层具有采用0.13μm的铜/多孔超低k [Porous-SiLK(美国陶氏化学公司的专有产品),k〜2.2)单金属镶嵌工艺制造。电气测试表明,与传统的PVD多层陶瓷相比,具有这种a-SiC:H / Ta电介质/金属双层结构的样品的线间泄漏电流和电击穿场(E_(BD))得到了显着改善。堆叠的Ta(N)侧壁势垒。这种改善主要归因于a-SiC:H膜沉积后表面粗糙度的改变,这不仅对铜的扩散具有良好的阻挡作用,而且还可以有效地“密封”多孔低k材料表面的薄弱点。是造成侧壁势垒失效的原因。

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