针对单片闪速存储器NAND FLASH容量相对小、存储速度相对低且存在随机无效块等问题,提出一种由单片NAND FLASH构建大容量高速存储阵列并根据阵列的结构特点管理无效块的方法.深入分析阵列存储方式及位扩展、时分多路复用等关键技术,针对复杂的阵列组成提出四种无效块管理机制:全相关、全独立、行相关、列相关等.各相关模块独立建立无效块标识区,统一管理本相关模块的无效块,保证存储过程中CPU能快速定位到有效块地址值.最后通过实验验证了系统的存储容量和存储速度均达到预期目标.%For NAND FLASH memory' s issues such as relatively small volume, low - speed and invalid blocks, is proposed by a single high - speed large - capacity FLASH memory array constructed and managed according to the structural characteristics of the array invalid block approach. Then the mode of storage arrays and the key technologies include bit- extended and time division multiplexing were analyzed. For the composition of the complex array of four invalid block management system: full correlation, fully independent, row correlation, column correlation. Establishing the relevant module invalid block ID area, the unified management of invalid blocks of the related modules to ensure the stored procedure CPU can quickly locate the valid block address values. Finally, experimental verification of the system's storage capacity and memory speeds are up to expectations.
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