基于FPGA的图像采集显示系统研究与设计

摘要

The principle of image capture and display system using SDRAM as image memory is analyzed and neces-sary buffer for memory access is summarized in this paper.A system with minimum buffer cost was designed and imple-mented based on FPGA.This system use FPGA as main control device,OV7670 image sensor as the capture device and the SDRAM as image frame memory.The VGA control er displays the image on the external monitor real-timely.On the sen-sor side and display side only 16 pixels buffer was used respectively,which save a lot of FPGA resource.%分析了以SDRAM作为图像存储器的采集显示系统原理，总结了图像数据存取过程中所需的缓存存储空间，并以最小的缓存开销设计并实现了一个基于FPGA的图像采集显示系统。系统采用FPGA作为主控器件，片上RAM作为图像缓存，以OV7670作为图像传感器采集器件，以VGA接口控制器将图像实时地显示在外部显示器件上。系统在图像传感器端和显示端分别只需要16个像素大小的缓存，有效减少了FPGA片上资源的使用。同时根据实验结果，系统运行稳定，显示效果良好。