Thin film silicon by a microwave plasma deposition technique: Growth and devices, and, interface effects in amorphous silicon/crystalline silicon solar cells.

摘要

Thin film silicon (Si) was deposited by a microwave plasma CVD technique, employing double dilution of silane, for the growth of low hydrogen content Si films with a controllable microstructure on amorphous substrates at low temperatures ({dollar}<{dollar}400{dollar}spcirc{dollar}C). The double dilution was achieved by using a Ar (He) carrier for silane and its subsequent dilution by H{dollar}sb2{dollar}. Structural and electrical properties of the films have been investigated over a wide growth space (temperature, power, pressure and dilution). Amorphous Si films deposited by silane diluted in He showed a compact nature and a hydrogen content of {dollar}sim{dollar}8 at.% with a photo/dark conductivity ratio of 10{dollar}sp4{dollar}. Thin film transistors (W/L = 500/25) fabricated on these films, showed an on/off ratio of {dollar}sim{dollar}10{dollar}sp6{dollar} and a low threshold voltage of 2.92 volts. Microcrystalline Si films with a high crystalline content ({dollar}sim{dollar}80%) were also prepared by this technique. Such films showed a dark conductivity {dollar}sim{dollar}10{dollar}sp{lcub}-6{rcub}{dollar} S/cm, with a conduction activation energy of 0.49 eV. Film growth and properties have been compared for deposition in Ar and He carrier systems and growth models have been proposed.; Low temperature junction formation by undoped thin film silicon was examined through a thin film silicon/p-type crystalline silicon heterojunctions. The thin film silicon layers were deposited by rf glow discharge, dc magnetron sputtering and microwave plasma CVD. The hetero-interface was identified by current transport analysis and high frequency capacitance methods as the key parameter controlling the photovoltaic (PV) response. The effect of the interface on the device properties (PV, junction, and carrier transport) was examined with respect to modifications created by chemical treatment, type of plasma species, their energy and film microstructure interacting with the substrate. Thermally stimulated capacitance was used to determine the interfacial trap parameters. Plasma deposition of thin film silicon on chemically clean c-Si created electron trapping sites while hole traps were seen when a thin oxide was present at the interface. Under optimized conditions, a 10.6% efficient cell (11.5% with SiO{dollar}sb2{dollar} A/R) with an open circuit voltage of 0.55 volts and a short circuit current density of 30 mA/cm{dollar}sp2{dollar} was fabricated.